Renesas Technology Announces SH-MobileR2, Multimedia Host Processor With Integrated H.264/MPEG-4 Video Engine for Next Generation Multimedia Applications

Monday, April 14th, 2008
Renesas logo

The New 400MHz Application Processor is Ideal for Personal Navigation Devices, Multimedia IP Phones, IP Security Surveillance Systems, Digital Picture Frames and Other Products

SAN JOSE, Calif. — Embedded Systems Conference Silicon Valley 2008 — Renesas Technology America, Inc. today announced the SH-MobileR2 (product name: SH7723), the latest member in the SH-Mobile series of application processors for portable multimedia systems. The new device enables the design of portable and mobile devices with multimedia capabilities that are suitable for personal navigation devices (PNDs), portable media players and V2IP (video and voice over IP) terminals.

The new multimedia processor is a next-generation device of the SH-MobileR, the first device in the SH-Mobile series designed for low power multimedia systems. The SH-MobileR2 operates about 1.5 times as fast as the first generation and delivers higher levels of processing performance in encoding and decoding audio and visual data.

The new SH-MobileR2 incorporates the SH-4A CPU core that operates at up to 400MHz and has a floating-point processing unit (FPU) that increases the efficiency of video and audio processing. At 400MHz, processing performance is 720 MIPS (million instructions per second), and FPU performance is 2.8 GFLOPS (giga floating-point operations per second). This is more than sufficient to handle parallel processing of multiple applications or general-purpose operating systems such as Windows® CE or Linux, which impose significant processing loads. In addition, the SH-MobileR2’s 64Kbyte primary cache memory (32Kbytes each for instructions and data) is supplemented by a new 256Kbyte secondary cache memory (mixed instructions and data) that contributes to faster software execution.

The application processor has many on-chip peripherals, among which is the VPU5F (Video Processing Unit 5F) multi-CODEC video processing function, an IP block that achieves high performance with low power consumption. The VPU5F supports the H.264/MPEG-4 video compression standard used in Internet streaming applications and can perform VGA-size encoding and decoding at a rate of 30 frames per second (fps). It also supports MPEG-4 encoding and decoding and VC-1 decoding, making it possible to implement video e-mail, videophone, and video capture applications.

The SH-MobileR2’s 2-D graphics accelerator provides enhanced functionality and performance for faster, better-quality map rendering. Other peripheral functions include USB 2.0 host/function support (high-speed), an ATAPI controller allowing connection to a hard disk or DVD drive, and an SD host controller with high-speed specification capability.

These many high-performance peripheral functions built into the new application processor make it possible to reduce the total number of parts of multimedia products and reduce the system cost, while maintaining high-level performance. To help customers shorten the development time of new products that use the SH-MobileR2 chip, a wide variety of middleware products are available for the device, including video middleware supporting H.264, MPEG-4, and WMV and audio middleware supporting aacPlus (Advanced Audio Coding Plus).

Renesas Technology aims to further extend the SH-Mobile series in future by developing products for increasingly advanced and sophisticated multimedia application systems and by introducing products optimized for evolving market needs in a timely manner. For example, a range of system solutions is planned, including a reference platform that uses the SH-MobileR2 and a graphics library that supports the functions of the 2-D graphics accelerator. The reference platform will be a useful tool for examining system functions, evaluating performance, and boosting the efficiency of software development. The graphics library will facilitate the implementation of a variety of map rendering functions.

Price and availability

Product Name (Type Name) Operating
Frequency
Operating
Temperature
Range
Unit Price for
10,000-Unit Lot /
Availability
SH-MobileR2: SH7723 (R8A77230C400BG) 400MHz -20 to 70°C $26/Now
SH-MobileR2: SH7723 (R8A77230D400BG) -40 to 85°C $30/Now

Specifications: New Renesas Technology SH-MobileR2 Application Processor

Item SH-MobileR2 Specifications
Product name SH7723 (R8A77230C400BG) SH7723 (R8A77230D400BG)
Operating temperature range -20 to +70°C -40 to +85°C
CPU core SH-4A (32-bit superscalar RISC type with FPU and MMU)
Power supply voltage Internal: 1.15V to 1.3V
External: 3.0V to 3.6V
DDR1 SDRAM: 2.3V to 2.7V
Max. operating frequency 400MHz
Max. processing performance 720 MIPS, 2.8 GFLOPS (at 400MHz operation)
Cache memory Primary cache: Separated into 32Kbytes for instructions and 32Kbytes for data
Secondary cache: Mixed 256Kbytes for instructions and data
Media RAM 128Kbytes
On-chip RAM 16Kbytes
External memory • DDR1 dedicated memory controller
Support for connection via 32-bit bus
Max. operating frequency: 133.4MHz
• Local bus controller:
Support for connection of burst ROM, SRAM, PCMCIA, etc.
Support for connection via 16-bit or 32-bit bus
Max. operating frequency: 66.7MHz
Main on-chip peripheral functions • Video I/O (direct-connection interface for 5-megapixel camera module)
• Video image processing functions (color conversion, image enlargement/ reduction, filter processing)
• Image blending function
• VPU5F (H.264, MPEG-4, VC-1)
• Video output unit
• LCD control with support for 24-bit TFT color LCD panel
• 2-D graphics accelerator
• USB 2.0 host, function (high-speed support)
• ATAPI interface
• TS interface
• DMAC x 12 channels
• Sound interface unit x 2 channels
• 32-bit timer unit x 6 channels
• 32-bit compare-match timer x 1 channel
• 16-bit timer pulse unit x 4 channels
• Real-time clock x 1 channel
• Watchdog timer x 1 channel
• I2C Bus interface x 1 channel
• Key scan interface
• Asynchronous/clock synchronous serial interface x 6 channels
• IrDA interface (v1.2a support)
• NAND flash memory interface
• SD memory/SDIO card interface x 2 channels
• A/D converter x 4 channels
• H-UDI on-chip debug function
Power-down modes • Sleep, Standby, U-standby
Package 449-pin BGA (21 mm x 21 mm, 0.8 mm pin pitch)

Notes: SuperH is a trademark of Renesas Technology Corp. Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. Linux is a registered trademark of Linus Torvalds in the United States and other countries. aacPlus is a trademark of Coding Technologies. Other product names, company names, or brands mentioned are the property of their respective owners.