Digital TV News: Allegro DVT
Allegro DVT launches multi-format video encoder IP for 4K/UHD
Nov 28, 2018 – Allegro DVT has announced the availability of AL-E200, a new generation of video encoder IPs built around a higher performance architecture. The AL-E200 uses an enhanced single-core hardware architecture that enables encoding of UHD/4K resolutions.
News categories: Allegro DVT, Nouar Hamze, Digital TV, Silicon IP, Worldwide
Allegro DVT introduces HDR and HFR system compliance streams
Oct 16, 2018 – Allegro DVT has announced the addition of High Dynamic Range (HDR) and High Frame Rate (HFR) functionalities to its DVB HEVC System test suite for UHDTV. The tool allows TV and CE manufacturers to test their devices for enhanced video capabilities.
News categories: Allegro DVT, ATSC 3, Digital TV, Semiconductor, Smart TV, Worldwide
Allegro DVT releases Full Compliance Test Suite for the AV1 codec
Sep 12, 2018 – Allegro DVT has announced the availability of its AV1 compliance streams following the public release of the AOMedia Video Codec 1.0 (AV1) specification by the Alliance for Open Media (AOMedia) on March 28th, 2018.
News categories: Allegro DVT, Alliance for Open Media, Nouar Hamze, Media Player, Silicon IP, Worldwide
Montage Technology licenses Allegro DVT video encoder IP for STB ICs
Oct 17, 2017 – Allegro DVT has announced that Montage Technology has licensed Allegro DVT's AL-E100 multi-format H.264/AVC and H.265/HEVC encoder IP for integration into its next-generation set-top box (STB) products.
News categories: Allegro DVT, Montage Technology, Pierre Marty, Gene Liu, Digital TV, Semiconductor, Set Top Box, Silicon IP, Worldwide
Anyka Micro selects Allegro DVT multi-format video encoder IP
Feb 21, 2017 – Allegro DVT has announced that Anyka Microelectronics has licensed Allegro DVT's multi-format H.264/AVC, H.265/HEVC and JPEG encoder IP for its next-generation System-on-Chips (SoCs) targeting a wide range of end markets.
News categories: Allegro DVT, Anyka Microelectronics, Pierre Marty, Dr. Norman Hu, China, Semiconductor, Silicon IP, Worldwide
Allegro DVT releases multi-codec verification coverage tool
Oct 25, 2016 – Allegro DVT has unveiled a coverage tool that checks that every item of a video compression standard has been exercised by a test. It allows silicon vendors to confirm that their video decoder achieves the highest compliance.
News categories: Allegro DVT, Pierre Marty, Digital TV, QoE, Semiconductor, Silicon IP, Worldwide
Allegro DVT introduces lightweight video encoder IP
Oct 20, 2016 – Allegro DVT has announced the availability of a new lightweight version of its multi-format encoder HW IP targeted at consumer applications with requirements for high quality video compression.
News categories: Allegro DVT, Pierre Marty, Digital TV, Semiconductor, Silicon IP, Worldwide
Allegro DVT unveils ATSC 3.0 system compliance test suite
Sep 7, 2016 – Allegro DVT has announced an ATSC3.0 system test suite which will help silicon vendors and ATSC3.0 device manufacturers validate their implementations of products aimed at this new standard.
News categories: Allegro DVT, Pierre Marty, ATSC 3, Digital TV, IBC, Korea, QoE, Smart TV, Terrestrial, USA
MediaTek selects Allegro DVT AVS2 compliance streams
Sep 5, 2016 – Allegro DVT has announced that MediaTek has licensed Allegro DVT's AVS2 compliance streams. AVS2, China's next generation video codec, is developed by the AVS workgroup with a target to achieve more compression efficiency than the current AVS standard.
News categories: Allegro DVT, MediaTek, Pierre Marty, China, Digital TV, Semiconductor
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