Amphion extends IP family to support AV1 video decoding up to 4K/UHDThursday, May 9th, 2019
Amphion Semiconductor introduces 4K/UHD capable AV1 video decoder hardware IP extension to its Malone video decoder family
Amphion has announced the scheduled availability of a hardware based AV1 decoding extension to its Malone family of high performance video decoders for SoC implementation. AV1 is the video coding format released by AoM (Alliance for Open Media) and has been shown to be capable of delivering up to 30% better compression rates when compared to current state of the art formats such as HEVC (also known as H.265) and VP9.
To support next generation applications, a decoder is typically required to be capable of decoding a range of different video formats to support state of the art and legacy content. Therefore, rather than developing a standalone AV1 decoder, Amphion is adding AV1 decode capability to its existing multi-format video decode solution. In its standard configuration this adds AV1 4Kp60 (UHD) decode capability to the other 13 formats already supported in the core including VP9, HEVC/H.265 and AVC/H.264 along with all previous legacy formats. The architecture is also scalable to configurations which support even higher resolutions, such as 8K, or higher frame rates, such as 120/240fps.
Amphion’s CEO, Stephen Farson, commented that “Amphion’s experience in the development of compact, efficient hardware based multi-format decoders is allowing us to add AV1 decode capability to consumer grade SoCs with the least expense to the size of the implementation. This helps to control silicon cost and makes it easier for designers to hit cost points without having to limit decoding features.”
With industry experts estimating that AV1 decoding is an order of magnitude more complex that previous formats such as HEVC and VP9, SoC developers for consumer applications will look to hardware based decoders such as those provided by Amphion as the only feasible solution to meet the required performance, silicon area and power constraints for such applications.