Fujitsu launches full HD multi-standard decoder device supporting both MPEG-2 and H.264
Tuesday, February 26th, 2008Single-chip solution for DVB HDTV receivers
LANGEN, Germany — Fujitsu Microelectronics Europe (FME) today announced the launch of a new full high-definition (HD) multi-standard video decoder device for DVB broadcasts, that decodes both MPEG-2 and H.264 compressed video up to full HD resolution (1920 dots x 1080 lines). Sample shipment of the new device, the MB86H60, will start from the end of May 2008.
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This device is a highly integrated System-on-Chip (SoC) and complies with the digital broadcast standard DVB used in various regions including Europe. This single chip solution integrates the necessary processing functions required by digital HDTV receivers, including processing of digital video, audio and graphics. This makes the MB86H60 multi-standard decoder suitable for integrated digital TV (IDTV) sets, set-top boxes and portable receivers.
The digital broadcasting standard DVB is used in Europe, Russia, the Middle East and by some broadcasting systems in China. Broadcasts are currently made in standard definition (SD) using the MPEG-2 video compression format. Next-generation broadcasts will be in HD, and in Europe, it has been decided that H.264 will be the main format. As the shift to HD broadcasts in Europe and elsewhere will occur gradually, decoder devices used in TVs and set-top boxes for these regions need to be capable of decoding both MPEG-2 and H.264 formats.
Until now, Fujitsu has offered its successful SmartMPEG devices that are capable of decoding the MPEG-2 SD format. These are used in TVs, set-top boxes, and portable receivers, mainly for the European market. Following HD broadcasting in Japan and the US, Fujitsu has built on its extensive experience to offer this multi-standard decoder, capable of supporting both MPEG-2 and H.264 formats on a single chip, ready for the ramp up of HD broadcasting in Europe.
Key Specifications
CPU Core | ARM® 1176JZF-S™ CPU @ 324 MHz (1) | |
---|---|---|
Video | Profile | H.264 High profile/level 4.0 decoder MPEG-2 Video Main profile/High level decoder |
Video encoder | Supports PAL/NTSC/SECAM, 7ch Video DAC embedded, Supports Teletext/WSS/PDC/CC/VBID |
|
Interface | ITU-R BT.656 I/O, digital RGB888 output YPrPb analog HD output |
|
Audio | Type | MPEG-1/2 Layer I/II/III, MPEG-2/4 AAC LC, etc |
Channels | 5.1 | |
Interface | L/R serial, S/P-DIF | |
TS processing | Format | MPEG-2 TS standard |
Interface | 3 input streams, 1 output stream, Built-in DVB descrambler | |
Encryption processing | 3DES encryption/decryption | |
DDR2 memory interface | 2 x 16-bit width DDR2-SDRAM-667 @ 324 MHz Supports 256Mbit to 1Gbit SDRAM |
|
Flash memory interface | Supports serial flash, NOR flash, NAND flash | |
Display | 5 planes: background (BG), video, cursor, OSD x 2 | |
USB | USB 2.0 high-speed OTG controller | |
Ethernet | 10/100baseT MAC | |
ATA | Multiword DMA ATA interface (16Mbps) | |
HDMI | HDMI 1.2 Link and PHY with HDCP 1.1 | |
UPI | NAND/NOR flash, common interface | |
Peripherals | UART x 2, Smart card x 2, I2C x 2, GPIO, PWM, IR Rx, SPI output | |
Input clock frequency | 27MHz | |
Power consumption | 1.2 W (typ.) | |
Packaging | 484-pin PBGA, 27sq mm, 1.0mm pitch | |
Process technology | 90nm | |
Operating Voltage | Core: 1.2V I/O: 3.3V (partial 5V tolerance) DDR2 memory interface: 1.8V |
1. ARM1176JZF-S is the trademark of ARM Limited
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