Fujitsu Launches SD Multi-Decoder LSI Supporting MPEG-2 & H.264

Thursday, November 27th, 2008
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For expanding H.264 SD broadcasts in Russia, Eastern Europe, China

TOKYO — Fujitsu Microelectronics Limited today announced the launch of multi-decoder LSI chips that support decoding of MPEG-2 and H.264 video compression formats for Standard Definition (SD) video, in particular for SD digital broadcasts in Russia, eastern Europe and China. Sample shipments of the new MB86H01 series will start from December 1, 2008.

These are system LSIs that are ideally suited to be used in TV and set-top-box (STB) equipment targeted for the Russian, eastern European and China markets. These new products support the DVB broadcasting standard used in those regions, with MPEG-2 and H.264 decoders integrated into a single chip with the functionality necessary for receiving SD broadcasts. Proprietary H.264 decoder technology provides low power consumption, while the availability of small packaging makes these decoder LSIs ideal to be used in portable devices like personal navigation devices (PND) with built-in TV receivers.

The DVB digital broadcasting standard is used in Europe, Russia, and by some broadcast systems in China. For SD broadcasting, the MPEG-2 compression format is widely used, however it is expected that the next-generation compression format H.264 will ramp up in eastern Europe including Russia. Also, the H.264 format is used in some cable TV services in China for interactive video-on-demand (VoD).

Up until now, Fujitsu Microelectronics has had success with its SmartMPEG series of MPEG-2 decoder LSIs for SD digital TV broadcasts for the DVB standard. SmartMPEG has been implemented widely in TVs, STBs, and portable TV receivers especially in Europe.

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With the shift of SD broadcasting to the H.264 format in Russia, eastern Europe, China, and elsewhere, TVs and STBs for these regions need to be able to handle decoding of both MPEG-2 and H.264 formats. Targeting such markets, Fujitsu Microelectronics is offering this new MB86H01 series, which consists of two (2) SD multi-decoder LSI products (MB86H01 AA / MB86H01 AB) that support both MPEG-2 and H.264 formats.

The new LSI multi-decoders include the necessary functionality for TVs and STBs to process SD digital broadcasts, including two (dual) MPEG-2 decoders and one H.264 decoder. The dual MPEG-2 decoders enable the processing of two (2) video streams that can be used in digital video recorders (DVR) with twin tuners. It also allows viewing of two (2) programs at the same time with picture-in-picture.

Using proprietary H.264 decoder technology, the power consumption for the H.264 decoder is reduced to a low level. Combined with the small 10 mm x 10mm package (FBGA 240-pin), the decoder is ideal for use in portable or small form-factor devices. A high-speed USB2.0 OTG controller is also integrated, giving excellent connectivity to external devices, such as digital cameras.

Leveraging Fujitsu’s highly regarded expertise in image and video processing-related technologies and products, Fujitsu Microelectronics will continue to strengthen its video processing LSIs for the TV and set-top-box markets, focusing on video-processing ASSPs.

Key Features

  1. Includes MPEG-2 dual decoders & H.264 decoder for digital broadcasts in Russia, eastern Europe, China
    Decodes both SD MPEG-2 and H.264 compression formats so it can handle not just the MPEG-2 SD broadcasts in Europe (in particular western Europe), but also supports the H.264 format for SD broadcasts which are expected to ramp-up in eastern Europe and Russia, as well as being used in some Chinese cable TV services for interactive Video-on-Demand (VoD). Having dual MPEG-2 decoders allows picture-in-picture on screen to enable viewing of two (2) programs simultaneously, as well as being suited to DVRs with twin tuners.
  2. Integrates on a single chip functions necessary for processing SD broadcasts
    These LSIs integrate into a single chip a 202.5 MHz ARC Tangent-A4 CPU together with the necessary video and audio decode functions, as well as screen display functionality needed to receive digital broadcasts, thus enabling easy system creation by customers.
  3. Small form-factor, necessary for portable devices
    The low power consumption was achieved with a proprietary developed H.264 decoder technology. The MB86H01 series offers a 27mm x 27mm package (PDGA 256-pin), as well as a small 10 mm x 10mm package (FBGA 240-pin) ideal for use in portable devices like personal navigation devices (PND) with built-in TV receivers.
  4. Succession to existing SmartMPEG series architecture
    This LSI has package and pin compatibility with the existing SmartMPEG-C series, as well as maintaining architectural compatibility. This allows current SmartMPEG users to efficiently upgrade or develop their systems.

MB86H01 Series Sample Availability

Product Name               Sample Availability
-------------------------  ---------------------
MB86H01 AA (PBGA 256-pin)  From December 1, 2008 
MB86H01 AB (FBGA 240-pin)  From December 1, 2008

More: Key Specifications of the Multi-decoder, MB86H01 [51KB]