MediaPhy Unveils All-Segment Single-Chip for Japanese Mobile TV Applications

Wednesday, October 10th, 2007

Introduces Smart-Seg™ for Seamless Switching Between 1-Seg, 3-Seg and 13-Seg

SAN JOSE, Calif. — Following the launch of its multi-standard single-chip offering for global mobile TV applications last month, MediaPhy today introduced the second member of its product family, the J-Solo™, designed specifically to address the rapidly growing Japanese mobile TV market. The all CMOS single-die J-Solo covers ISDB-T 1-3-13 segments, enabling seamless mobile TV throughout Japan.

Among the most advanced features of the J-Solo device is Smart-Seg™. This feature allows seamless switching between 1-seg, 3-seg and 13-seg modes, enabling best quality reception at all times in all locations. Smart-Seg operates by intelligently monitoring a number of reception parameters and automatically selecting the mode that offers the best reception quality. All features of Smart-Seg are user-configurable to manual or automatic modes.

Featuring a proprietary architecture that enables ultra-low power consumption, ISDB-T 1-seg operates at 80 mW of power, while ISDB-T 13-seg requires only 120 mW. It is ideal for implementation in cell phones, laptops, PDAs, PMPs, as well as automotive systems throughout the Japanese market.

“With its ‘Free-to-Air’ broadcasting, the Japanese mobile TV market is currently the most active in the world,” stated Terry Leeder, CEO and President of MediaPhy. “There are no technological barriers to adoption at this point, which represents a significant business opportunity. The Japanese market is advancing this technology based on three principals: performance, cost and power. With the launch of the J-Solo, we deliver critical improvements in all of these areas. In addition, and of equal importance, we are able to bring significant enhancements to the end-user experience with the introduction of features such as Smart-Seg.”

Manufactured in 130nm RF CMOS process and in a 7x7mm package, the single-die monolithic design features a complex frequency-agile radio and unique configurable hardware engine-based architecture (CHE). Due to its system-level design many components have been integrated into the single-chip in order to reduce the bill of materials (BOM) cost while enhancing overall system performance.

The chip will sample to customers this month and is expected to go into volume production in the first quarter of 2008.