Allegro DVT Showcases the First HEVC Video Hardware Decoder IP at CES 2013

GRENOBLE, France — Allegro DVT will present its HEVC Video Hardware Decoding IP, the world-first HEVC hardware decoder IP targeting mobile phones, tablets, set-top boxes, digital TVs… This IP can be implemented both on FPGA and SoC, supports any resolution up to 4K, and is optimized in terms of silicon area, power consumption and memory bandwidth. The current implementation fully complies with the latest available HEVC reference software (HM 9.1), and will be continuously updated until the HEVC standard is finalized.

This innovative product will allow Allegro DVT’s customers to tape-out soon after the final release of the standard, currently expected in January 2013. Allegro DVT will be running a live demonstration at its booth #35707.

Allegro DVT will also expose the rest of its video product line, including:

• H.264 Hardware Encoding & Codec IPs, with best-in-class video quality, minimized silicon area and power consumption.
• WiGig WDE Codec IP, the most advanced Wireless Display Extension (WDE) codec for next-generation 60 GHz wireless technology: 802.11 ad/WiGig.
• HEVC Compliance Streams, providing HEVC decoder manufacturers with the perfect tool for validating their developments, and ensuring compliance with this upcoming video standard.

Feel free to book a private demonstration at our booth #35707 at CES 2013 – January 8-11 2013.